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Wednesday, February 8 • 4:45pm - 5:25pm
Accelerating packet capture using FPGA - Jakub Duchniewicz, Software Engineer & Technical Leader, Tietoevry

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The talk covers accelerating networking packets utilizing a Field Programmable Gate Array (FPGA) in an embedded Linux System. Presented is a solution based on a custom Linux distribution assembled using the Buildroot tool, specially configured and patched Linux kernel, uboot bootloader, and the programmable logic for packet acceleration.

The project is evaluated on a De0-Nano System on Chip development board through modifications to burst lengths, packet sizes, and programmable logic clock frequency.
Metrics include packet capturing time, time per packet, and consumed power.
Finally, the results are contrasted with baseline embedded Linux packet processing by inspection of a packet’s path through the kernel.

The presentation should give a notion about relative complexity of packet capturing using an FPGA in the Linux system. More in-depth understanding of Linux networking path can be taken away from it as well.
A call to action to promote and popularize such acceleration is made at the end of the presentation. 

avatar for Jakub Duchniewicz

Jakub Duchniewicz

Team Leader and Senior Embedded Software / Embedded Engineer, Tietoevry / jduchniewicz
Jakub is a graduate of MSc in Embedded Systems with a minor in Innovation and Entrepreneurship. Jakub is currently working as an engineer and a team leader at Tietoevry where he hones his low-level skills developing L1 features for 5G NR. His experience ranges from embedded and systems... Read More →

Wednesday February 8, 2023 4:45pm - 5:25pm GMT
Burton & Redgrave, 2nd Floor Queen Elizabeth II Centre